1. Field Of The Invention
The present invention variously relates to (i) a method of forming a (Ga, Al, In) nitride base layer on a substrate for subsequent fabrication of a microelectronic device structure thereon, (ii) to a base structure for such fabrication, including a device quality, single-crystal, crack-free base layer of (Ga, Al, In) nitride on the substrate, in which the thickness of the base layer may, for example, be on the order of 2 microns and greater and the defect density of the base layer may, for example, be on the order of 1E8 cm.sup.-2 or lower, and (iii) to a device article comprising a device, e.g., a light emitting diode, detector, transistor, filter, semiconductor laser, etc. fabricated on such base structure.
2. Description of the Related Art
GaN and its related alloys comprising Al and In have many potential advantages, similar to the arsenide and phosphide alloys of these metals. These advantages stem from the ability to adjust the bandgap of the material by adjusting its composition, such that the bandgap of (Ga, Al, In) nitride can be adjusted from 1.9 to 6.2 eV. This characteristic of the (Ga, Al, In) nitride system lends itself to many applications, including UV-to-green LEDs, lasers and detectors, as well as high temperature, high power, and/or high frequency electronic devices. However, to date, there has been no effective lattice-matched substrate for the III-V nitrides, as exists for GaAs and InP based alloys. This circumstance has resulted in the use of "foreign" substrates for (Ga, Al, In)N device structures, using substrate materials such as sapphire, lithium gallate, lithium aluminate, zinc oxide, spinnel, magnesium oxide, silicon carbide, gallium arsenide, or silicon.
Of these foreign substrates, sapphire is the most commonly used for the growth of GaN-based materials and devices. However, sapphire, as well as many of the other foreign substrates, is electrically insulating with a low thermal conductivity and has a poor lattice-match to the (Ga, Al, In) nitride. As such, devices made from (Ga, Al, In) nitride grown on sapphire are limited by (1) high series resistance associated with inhibited lateral conduction of carriers through the bottom-most device layer to the active region of the device; (2) inability to dissipate heat away from the active region of the device; and (3) defects, dislocations and strain associated with the lattice-mismatch between the base layer and the substrate or between the conventional nucleation layer and the device structure.
The performance of GaN-based devices on insulating substrates is, in part, limited by the lateral conduction of carriers. An example of a basic GaN/InGaN light-emitting diode (LED) device 10 is shown in FIG. 1, which is a schematic drawing of a GaN/InGaN LED structure grown on an insulating substrate 12. In this device structure, an n-GaN layer 14 is formed on the substrate 12, with a (Ga, In)N active region 16 thereover. A p-GaN layer 18 is deposited on the (Ga, In)N layer, and overlaid by p contact layer 20. The n-GaN layer 14 has formed thereon an n contact layer 22, as shown. In this device, as a result of the insulating character of substrate 12, current must flow laterally through the thin n-type GaN layer. The lateral flow of current through the active region of the device is limited by the carrier transport in the thin n-type GaN layer, which in turn is limited by the thickness and conductivity of such n-GaN layer. This results in high series resistance which degrades device performance, lowers device efficiency and can result in shorter operation lifetimes due to excessive heat generation in this thin n-GaN layer.
The electrical conductance of this thin n-type conductive layer 14 is, in part, limited by the growth technique used to grow the device structure, in that the growth technique limits the attainable thickness which in turn limits the electrical conductance of the layer. For instance, the thickness of GaN and related alloys grown on sapphire by the most common techniques (molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD)) is limited both by the slow growth rates inherent to these techniques and by the cracking of the epilayer, which develops for layers thicker than a few microns. Cracking becomes more severe for highly n-type Si-doped GaN grown by MBE and MOCVD, which causes unacceptable yield loss for a manufacturing process.
The operating characteristics and lifetime of many microelectronic devices are dependent on the operating temperature of the device. For example, the threshold current density (J) of a semiconductor laser is very sensitive to the temperature of the device, and is given by the equation: EQU J=J.sub.0 exp((T-T.sub.0)/T.sub.0),
where J.sub.0 is the temperature independent threshold current density, T.sub.0 is the characteristic temperature of the device and T is the operating temperature of the device. This equation indicates that the threshold current density increases exponentially with the operating temperature of the device. Low threshold current density is required for laser applications, thus, being able to remove heat from the active region of a diode laser is essential to its good performance. Similar benefits are obtained for transistors (in the achievement of enhanced stability and enhanced lifetime) and detectors (in the achievement of low noise characteristics).
For substrates that have low thermal conductivity, such as sapphire, heat must be removed laterally from the device by the thin semiconductor layer. The heat flow, H, is given by the equation: EQU H=-kA(dT/dx),
where k is the thermal conductivity of the material, A is the cross-sectional area through which the heat must flow, and dT/dx is the temperature gradient. This equation shows that the ability to dissipate heat is directly proportional to the cross-sectional area, and thus for a lateral device is directly proportional to the thickness of the material. As previously mentioned, the thickness of the material grown by MBE and MOCVD is limited by slow growth rates and cracking of the material. Thus, a thick base layer would be inherently superior in removing heat from the device. As described above, keeping the temperature low improves device performance, stability and lifetime.
The density of defects and dislocations in the active region of a device affects the performance of the device. In addition, degradation and eventual failure of devices is enhanced by defects. It is thus important to minimize the number of defects in the material that forms the devices. GaN grown on sapphire, silicon carbide or other similarly poorly lattice-matched substrate, typically contains 1E10 cm.sup.-2 dislocations. The dislocations form to accommodate the difference in lattice constant between the substrate and GaN material grown on the substrate. Defects/dislocations generated in the initial layer propagate to the active region of the device. In addition, similar dislocations, although lower in density, occur because of lattice constant differences between the individual layers of the device. By growing thick base layers which are lattice-matched to the device structure, the total defect density could be significantly reduced. Control of the composition of the base layer could be employed to minimize the dislocations generated at the base layer-device material interface. By decreasing the defect density in the device material, longer-lived, higher performance devices could be realized.
The structural benefits are also applicable to GaN-based devices grown on conductive substrates, the most common conductive substrate for GaN based materials being silicon carbide. For these substrates, the art has proposed the formation of a multi-layer GaN/AlGaN epitaxial formation by MBE or MOCVD on the silicon carbide substrates, but such multi-layer formation of a GaN epitaxial layer is difficult to achieve, due to the close control of the deposition process required in each of the sublayer formation steps of the multi-layer formation technique.
Growth of GaN and related alloys on sapphire is complicated in that the growth conditions need to be very carefully controlled during the initial nucleation stages to achieve high quality material. Typically, thin nucleation layers (.about.200 .ANG.) are grown at low temperature (.about.500.degree. C.) prior to the growth of the GaN device structure. The thickness, growth rate and growth temperature must be controlled to extremely fine tolerances to achieve good product material.
Existing GaN LED devices fabricated with thin n-type GaN layers also exhibit high sensitivity to electrostatic discharge (ESD). It has been posited that the ESD sensitivity may result from reduced lateral carrier transport and a high density of vertical threading dislocations in the material (e.g., on the order of 10.sup.9 -10.sup.10 cm.sup.-2).
The high density of defects, and threading dislocations in particular, in III-V nitride materials are responsible for a host of problems which degrade device performance and limit device lifetime. X. H. Wu, C. R. Elsass, A. C. Abare, M. P. Mack, S. Keller, P. M. Petroff, S. P. DenBaars, and J. Speck, Proceedings of the Second International Conference on Nitride Semiconductors, (1997) 34, showed that localized growth rate changes, alloy composition and `V-defect` formation in InGaN-based multi-quantum wells originate at threading dislocations. H. M. Ng, D. Doppalapudi, D. Korakakis, R. Singh, and T. D. Moustakas, Proceedings of the Second International Conference on Nitride Semiconductors, (1997) 10, discloses that dislocations act as scattering centers.
S. J. Rosner, E. C. Carr, M. J. Ludowise, G. Girolami and H. I. Erikson, Appl. Phys. Lett, 70 (1997) 420, demonstrated a correlation between nonradiative recombination centers and threading dislocations. Magnesium was shown to migrate more readily away from desire regions of light-emitting diode device structures when a higher density of threading dislocations were present (N. Kuroda, C. Sasaoka, A. Kimura, A. Usui, and Y. Mochizuki, Proceedings of the Second International Conference on Nitride Semiconductors, (1997) 392).
U.S. Pat. No. 5,563,422 issued Oct. 8, 1996 to S. Nakamura et al. describes a gallium nitride-based III-V compound semiconductor device having a gallium nitride-based III-V compound semiconductor layer on a substrate, and an ohmic electrode provided in contact with the semiconductor layer. The substrate may be sapphire or other electrically insulating substrate.
In the Nakamura et al. patent, the GaN layer provided on the substrate is formed by MOCVD. In practice of the teachings of the Nakamura et al. patent, the GaN nucleation layer thickness achievable is only on the order of 100.ANG.. The defect density in these nucleation layers is thought to be on the order of 1E11 cm.sup.-2 or greater, and yields a defect density of 1E9 to 1E10 cm.sup.-2 or greater in the subsequently grown GaN layer.
U.S. Pat. No. 5,393,993 issued Feb. 28, 1995 to J. A. Edmond, et al. describes a transition crystal structure between GaN and SiC. The transition structure consists of two or three individual layers of AlGaN. The Al mole percentage in these individual layers are substantially different from each other. However, in practice of the teachings of this Edmond et al. patent, the thickness of the individual layer thickness achievable is only on the order of 1000 .ANG., and the dislocation density is typically 1E8-1E9 cm.sup.-2 in the subsequently grown GaN layer.
U.S. Pat. No. 5,523,589 issued Jun. 4, 1996 to J. A. Edmond et al. describes a vertical LED device on SiC substrates and includes a conductive AlGaInN buffer layer on SiC. The patent describes the formation of two graded composition layers. Such layers as mentioned hereinabove are extremely difficult to achieve.
U.S. Pat. No. 5,385,562 issued Jan. 31, 1995 to T. D. Moustakas describes a method of preparing highly insulating GaN single crystal films by MBE by a two step growth process which includes a low temperature nucleation step and a high temperature growth step. The low temperature nucleation process is carried out at 100-400.degree. C., resulting in an amorphous GaN nucleation layer of thicknesses between 200 and 500 .ANG.. The defect density in these nucleation layer is 1E11 cm.sup.-2 or greater, and yields a defect density of 1E9 to 1E10 cm.sup.-2 or greater in the subsequently grown GaN layer.
Japanese Patent 60-256806 to Akasaki et al. describes an AlN nucleation step, grown at 600.degree. C. to thicknesses of approximately 50 nm by MOCVD. Similarly, the defect density in these nucleation layer is thought to be 1E11 cm.sup.-2 or greater, and yields a defect density of 1E9 to 1E10 cm.sup.-2 or greater in the subsequently grown GaN layer.
Accordingly, it would be a substantial advance in the art, and accordingly is an object of the present invention to provide a growth technique which can produce thick, crack-free, conductive base layers which can be employed in devices to permit enhanced lateral conduction, lower dislocation density, increased heat dissipation and reduced ESD sensitivity while at the same time simplifying the growth process, in relation to prior art services and techniques.
It is another object of the invention to provide a base material and method of forming same, which may be grown on poorly lattice-matched substrates which effectively reduce the defect density in (Ga, Al, In)N devices fabricated on the substrate.
It is yet another object of the invention to provide a base structure on which (Ga, Al, In)N devices may be grown without the excessively close tolerances in thickness, growth rate and growth temperature which are required by the thin nucleation layers of the prior art.
It is a further object of the invention to provide a (Ga, Al, In)N device article including a device such as a light emitting diode, laser, detector, transistor (e.g., field effect transistor), rectifier device, filter, etc. which is fabricated on a base structure including a base layer on a substrate.
Other objects and advantages of the present invention will be more fully apparent from the ensuing disclosure.